#define _SYS_TASK_MODULE_

#include "common.h"
#include "gpio.h"
#include "systask.h"
#include "pulse.h"
#include "dataproc.h"
#include "pulse.h"
#include "os_obj.h"
#include "malloc.h"
#include "sys_init.h"
#include "hal_mixed.h"

void  reg_dbg_info_get(void);
void mem_speed_test(void);

timer_pulse_type sys_pulse;
uint32_t SysTaskCnt = 0;

OBJ_SECTION(".sram") uint32_t tst_dat_sram[8*1024] ; 
uint32_t tst_dat_sdram[8*1024] ; 

#if DBG_EN > 0
uint32_t sys_mfp_reg[24];
#endif

/*****************************************************************************/ /*!
*
* @brief   led task.
*
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/
void SysTask(void *argument)
{
    
    uint32_t *p_Buff;
    
    mem_speed_test();
    
    os_obj_create();
    
    os_thread_init();
    
    osDelay(ms_ticks(100));
    
    pulse_init(&sys_pulse, uTick);
    p_Buff = mymalloc(1024*16);
    DBG_INFO("sys task malloc memory address: 0x%08x \n",(uint32_t)p_Buff);
    p_Buff = mymalloc(1024*16);
    DBG_INFO("sys task malloc memory address: 0x%08x \n",(uint32_t)p_Buff);
    
    DBG_INFO("CPU CLK: %d \n",sysGetClock(SYS_CPU));
    DBG_INFO("UPLL CLK: %d \n",sysGetClock(SYS_UPLL));
    DBG_INFO("APLL CLK: %d \n",sysGetClock(SYS_APLL));
    DBG_INFO("SYSTEM CLK: %d \n",sysGetClock(SYS_SYSTEM));
    DBG_INFO("HCLK1 CLK: %d \n",sysGetClock(SYS_HCLK1));
    DBG_INFO("HCLK234 CLK: %d \n",sysGetClock(SYS_HCLK234));
    DBG_INFO("PCLK CLK: %d \n",sysGetClock(SYS_PCLK));
    
    DBG_INFO("No cache Write sram 16MB time : %dms \n",sys_run_st.sram_w_speed);
    DBG_INFO("No cache Read sram 16MB time : %dms \n",sys_run_st.sram_r_speed);
    DBG_INFO("No cache Write sdram 16MB time : %dms \n",sys_run_st.sdram_w_speed);
    DBG_INFO("No cache Read sdram 16MB time : %dms \n",sys_run_st.sdram_r_speed);
    
    for (;;)
    {
        PulseCreat(&sys_pulse, uTick);
        osDelay(ms_ticks(100));
        if (sys_pulse.bPulse_1s)
        {
            SysTaskCnt++;
        }
        else if(sys_pulse.bPulse_500ms)
        {

        }
        #if DBG_EN > 0
        reg_dbg_info_get();
        #endif
    }
}

/*****************************************************************************/ /*!
*
* @brief   debug info.
*
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/
#if DBG_EN > 0
void  reg_dbg_info_get(void)
{
    /*--------------------------------MFP-----------------------------------*/
        sys_mfp_reg[0] = inpw(REG_SYS_GPA_MFPL);
        sys_mfp_reg[1] = inpw(REG_SYS_GPA_MFPH);
        sys_mfp_reg[2] = inpw(REG_SYS_GPB_MFPL);
        sys_mfp_reg[3] = inpw(REG_SYS_GPB_MFPH);
        sys_mfp_reg[4] = inpw(REG_SYS_GPC_MFPL);
        sys_mfp_reg[5] = inpw(REG_SYS_GPC_MFPH);
        sys_mfp_reg[6] = inpw(REG_SYS_GPD_MFPL);
        sys_mfp_reg[7] = inpw(REG_SYS_GPD_MFPH);
        sys_mfp_reg[8] = inpw(REG_SYS_GPE_MFPL);
        sys_mfp_reg[9] = inpw(REG_SYS_GPE_MFPH);
        sys_mfp_reg[10] = inpw(REG_SYS_GPF_MFPL);
        sys_mfp_reg[11] = inpw(REG_SYS_GPF_MFPH);
        sys_mfp_reg[12] = inpw(REG_SYS_GPG_MFPL);
        sys_mfp_reg[13] = inpw(REG_SYS_GPG_MFPH);
        sys_mfp_reg[14] = inpw(REG_SYS_GPH_MFPL);
        sys_mfp_reg[15] = inpw(REG_SYS_GPH_MFPH);
        sys_mfp_reg[16] = inpw(REG_SYS_GPI_MFPL);
        sys_mfp_reg[17] = inpw(REG_SYS_GPI_MFPH);
}
#endif


/*****************************************************************************/ /*!
*
* @brief   mem speed test.
*
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/
void mem_speed_test(void)
{
    typedef unsigned short tst_t;
        
    tst_t *pdat;
    uint32_t cnt, index;
    
    register rt_ubase_t level;
    level = rt_hw_interrupt_disable();
    
    timer0_start();
    
    cnt = 32*16;
    while(cnt--)
    {
        pdat = (tst_t *)((uint32_t)tst_dat_sram | 0x80000000);
        index = 8*1024;
        while(index--)
            *pdat++ = index;
    }
    
    sys_run_st.sram_w_speed = timer0_cnt_get();
    timer0_start();
    
    cnt = 32*16;
    while(cnt--)
    {
        pdat = (tst_t *)((uint32_t)tst_dat_sram | 0x80000000);
        index = 8*1024;
        while(index--)
            sys_run_st.tst_dat = *pdat++;
    }
    
    sys_run_st.sram_r_speed = timer0_cnt_get();
    timer0_start();
    
    cnt = 32*16;
    while(cnt--)
    {
        pdat = (tst_t *)((uint32_t)tst_dat_sdram | 0x80000000);
        index = 8*1024;
        while(index--)
            *pdat++ = index;
    }
    
    sys_run_st.sdram_w_speed = timer0_cnt_get();
    timer0_start();
    
    cnt = 32*16;
    while(cnt--)
    {
        pdat = (tst_t *)((uint32_t)tst_dat_sdram | 0x80000000);
        index = 8*1024;
        while(index--)
            sys_run_st.tst_dat = *pdat++;
    }
    
    sys_run_st.sdram_r_speed = timer0_cnt_get();
    timer0_start();
    
    rt_hw_interrupt_enable(level);
}
